Last edited by Nanris
Wednesday, October 7, 2020 | History

3 edition of A hardware implementation of a probably correct design of a fault-tolerant clock synchronization circuit found in the catalog.

A hardware implementation of a probably correct design of a fault-tolerant clock synchronization circuit

A hardware implementation of a probably correct design of a fault-tolerant clock synchronization circuit

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Published by National Aeronautics and Space Administration, Langley Research Center, National Technical Information Service, distributor in Hampton, Va, [Springfield, Va .
Written in English

    Subjects:
  • Computer networks.

  • Edition Notes

    StatementWilfredo Torres-Pomales.
    SeriesNASA technical memorandum -- 109001.
    ContributionsLangley Research Center.
    The Physical Object
    FormatMicroform
    Pagination1 v.
    ID Numbers
    Open LibraryOL14700635M


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